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- Power supply voltage: VDD = 1.8 to 5.5 V
- Max. frequency 20 MHz
- ROM capacities 64 KB to 128 KB flash memory
- RAM capacities 4 KB to 8 KB
- 64-pin LQFP package
- Minimum instruction execution time can be changed from high speed (0.05 µs: @ 20 MHz operation with high speed system clock) to ultra low-speed (61 µs: @ 32.768 kHz operation with subsystem clock)
- General-purpose register: 8 bits x 32 registers (8 bits x 8 registers x 4 banks)
- On-chip internal high-speed oscillation clocks
- 20 MHz Internal high-speed oscillation clock: 20 MHz±1 % (target)
- 8 MHz Internal high-speed oscillation clock: 8 MHz±1 % (target)
- 1 MHz Internal high-speed oscillation clock: 1 MHz±5 %
- On-chip single-power-supply flash memory (with prohibition of chip erase/block erase/writing function)
- Self-programming (with boot swap function/flash shield window function)
- On-chip debug function
- On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
- On-chip watchdog timer (operable with the dedicated internal low-speed oscillation clock)
- On-chip multiplier/divider (16 bits x 16 bits, 32 bits / 32 bits)
- On-chip key interrupt function
- On-chip clock output/buzzer output controller
- On-chip BCD adjustment
- I/O ports: 71 (N-ch open drain: 4)
- Timer: 14 channels
- 16-bit timer: 12 channels
- Watchdog timer: 1 channel
- Real-time counter: 1 channel
- On-chip comparator/programmable gain amplifier function
- Serial interface
- CSI: 2 channels/UART: 1 channel
- CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
- CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
- UART (LIN-bus supported): 1 channel - I2C: 1 channel
- 10-bit resolution A/D converter (AVREF = 1.8 to 5.5 V): 10 to 12 channels
- Operating ambient temperature: TA = -40 to +85°C
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