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- Max. frequency: 32 MHz
- ROM capacities: 256 KB to 512 KB
- RAM capacities: 16 KB to 32 KB
- Package: 80-pin plastic LQFP
- Minimum instruction execution time: 31.25 ns (operating with main clock (fXX) of 32 MHz)
- General-purpose registers: 32 bits x 32 registers
- CPU features:
- Signed multiplication (16 x 16 -> 32): 1 to 2 clocks
- Signed multiplication (32 x 32 -> 64): 1 to 5 clocks
- Saturated operations (overflow and underflow detection functions included)
- 32-bit shift instruction: 1 clock
- Bit manipulation instructions
- Load/store instructions with long/short format
- Memory space: 64 MB of linear address space (for programs and data)
- Interrupts and exceptions:
- Non-maskable interrupts: 2 sources (external: 1, internal: 1)
- Maskable interrupts: 72 sources (external: 15, internal: 57) (µPD70F3755) / 78 sources (external: 15, internal: 63) (µPD70F3757)
- Software exceptions: 32 sources
- Exception trap: 2 sources
- I/O ports: 84
- Timer function:
- 16-bit interval timer M (TMM): 1 channel
- 16-bit timer/event counter AA (TAA): 5 channels
- 16-bit timer/event counter AB (TAB): 1 channel
- Watch timer: 1 channel
- Watchdog timer 2: 1 channel
- Serial interface:
- Asynchronous serial interface D (UARTD): 3 channels (µPD70F3755) / 6 channels (µPD70F3757) - 3-wire variable-length serial interface B (CSIB): 2 channels
- I2C bus: 1 channel
- A/D converter: 10-bit resolution: 24 channels
- DMA controller: 4 channels (transfer target: on-chip peripheral I/O, internal RAM)
- DCU (debug control unit): JTAG interface
- Clock generator:
- During main clock or subclock operation
- 7-level CPU clock (fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)
- Clock-through mode/PLL mode (x8)/SSCG mode selectable
- Low-speed internal oscillation clock (fRL): 240 kHz (TYP.)
- High-speed internal oscillation clock (fRH): 8 MHz (TYP.)
- Power-save functions: HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
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