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The LM3S818 is based on the high-performance ARM® Cortex™-M3 v7M architecture. It is fully Thumb®-compatible with a Thumb-2-only instruction set and features hardware-division and single-cycle-multiplication. The integrated Nested Vectored Interrupt Controller (NVIC) provides deterministic interrupt handling. Target applications include factory automation and control, industrial control power devices, and building and home automation.
Product Features
- 32-bit ARM® Cortex™-M3 v7M architecture
- Thumb®-compatible Thumb-2-only instruction set
- 50-MHz operation
- Hardware-division and single-cycle-multiplication
- Integrated Nested Vectored Interrupt Controller
- interrupt channels with eight priority levels
- 64 KB single-cycle flash
- 8 KB single-cycle SRAM
- Three timers, each of which can be configured as a single 32-bit timer as a dual 16-bit timer
- Real-Time Clock (RTC) capability
- 32-bit down counter
- Separate watchdog clock with an enable
- Programmable interrupt generation logic
- Lock register protection from runaway software
- Programmable interface operation for Freescale SPI, National Semiconductor MICROWIRE™, or Texas Instruments synchronous serial
- Master or slave operation
- Two fully programmable 16C550-type UARTs
- Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading
- Programmable baud-rate generator
- ADC Single- and differential-input configurations
- Six 10-bit ADC channels (inputs) when used as single-ended inputs
- ADC Sample rate of 1M samples/second
- Flexible, configurable analog-to-digital conversion
- One independent integrated analog comparator
- Configurable for output to: drive an output pin, generate an interrupt, or initiate an ADC sample sequence
- Compare external pin input to external pin input or to internal programmable voltage reference
- Six motion-control PWM outputs
- Each PWM generator block has one 16-bit counter, two comparators, a PWM generator, and a dead-band generator
- Output control block with PWM output enable of each PWM signal
- Can initiate an ADC sample sequence
- Hardware position integrator tracks the encoder position
- Velocity capture using built-in timer
- Interrupt generation on index pulse, velocity-timer expiration, and direction change
- 0 to 30 GPIOs, depending on user configuration
- Programmable interrupt generation
- Can initiate an ADC sample sequence
- Programmable drive strength and slew rate
- Bit-masking in both read and write operations through the address lines
- On-chip Linear Drop-Out (LDO) voltage regulator, with programmable output user-adjustable from 2.25 V to 2.75 V
- Low-power options on processor: Sleep and Deep-sleep modes
- Low-power options for peripherals: software controls shutdown of individual peripherals
- User-enabled LDO unregulated voltage detection and automatic reset
- 3.3-V supply brownout detection and reporting via interrupt or reset
- On-chip temperature sensor
- Debug access via JTAG and Serial Wire interfaces
- 48-pin RoHS-compliant LQFP
- Industrial operating temperature
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