Product Overview:

This H8S/2114 Group is a series of microcomputers (MCUs) made up of theH8S/2000 CPU with Renesas Technology’s exclusive architecture as the core, and the peripheral functions required to configure a system.
The H8S/2000 CPU has an internal 32-bit configuration, sixteen 16-bit general registers, and a simple and optimized instruction set for high-speed operation. The H8S/2000 CPU can handle a 16-Mbyte linear address space. The instruction set of the H8S/2000 CPU maintains upward compatibility at the object level with the H8/300 and H8/300HCPUs. This allows the transition from the H8/300, H8/300L, or H8/300H to theH8S/2000 CPU.
This LSI is equipped with ROM, RAM, two kinds of PWM timers(PWM and PWMX), a 16-bit free running timer (FRT), a 16-bit timer pulse unit(TPU), 8-bit timers (TMR), watchdog timer (WDT), serial communication interface(SCI), I2C bus interface (IIC), a LPC interface (LPC), a keyboard buffer control units (KBU), an A/D converter, and I/O ports as on-chip peripheral modules required for system configuration.
A data transfer controller (DTC) and LPC interface (LPC) are included as bus masters.
Flash memory is available for this LSI’s 1 Mbyte ROM. The CPU and ROM are connected to a 16-bit bus, enabling byte data and word data to be accessed in a single state.This improves the instruction fetch and process speeds.

Key Features:

• Operating frequency (MHz)/Supply voltage (V)
  • 20 MHz/3.0 V to 3.6 V
• On-chip memory
  • 1 MB/8 kB
• Supports on-chip debugger(E10A)
• Packages
  • Package = TQFP-144
  • Code = PTQP0144LC-A
  • Size Pin = 16.0 x 16.0 mm
  • pitch = 0.4mm 

Key Applications:

Home appliances, digital still cameras,games, instruments, and office automation equipment

General Functions

 

• High-speed H8S/2000 central processing unit with 16-bit architecture
  • Upward-compatible with H8/300 and H8/300H CPUs on an object level
  • Sixteen 16-bit general registers
  • 65 basic instructions
  • Address space: 16M byte
• Interrupts
  • Internal: 61
  • External: 17
• Varioius peripheral functions
  • Data transfer controller (DTC) 85 ch
  • 8-bit PWM timer (PWM) 8 ch
  • 14-bit PWM timer (PWMX) x 2 ch
  • 16-bit timer pulse unit (TPU) x 1 ch
  • 16-bit free-running timer (FRT)
  • 8-bit timer (TMR) x 4 ch
  • Watchdog timer (WDT) x 2 ch
  • Asynchronous or clocked synchronous serial communication interface (SCI) x 2ch
  • I2C bus interface (IIC) x 2 ch
  • Keyboard buffer control unit (KBU)
  • LPC interface (LPC)
  • 10-bit A/D converter x 8 ch
  • Boundary scan (JTAG)
  • Clock pulse generator
• General I/O ports
  • I/O pins: 106
  • Input-only pins: 13