Product Overview:

The H8S/2678 Group and H8S/2678R Group are microcomputers (MCU) made up oftheH8S/2600 CPU employing Renesas`s original architecture as core, and the peripheral functions required to configure a system.
It  has an internal32-bit configuration, sixteen 16-bit general registers, and a simple and optimized instruction set for high-speed operation. The H8S/2600 CPU can handlea16-Mbyte linear address space.
This LSI is equipped with direct memory access controller (DMAC and EXDMAC) and data transfer controller (DTC) bus masters, ROM and RAM memory, a 16-bit timer pulse unit (TPU), a programmable pulse generator (PPG), an 8-bit timer (TMR), a watchdog timer (WDT), a serial communication interface (SCI and IrDA), a 10-bit A/D converter, an 8-bit D/A converter, and I/O ports as on-chip peripheral modules required for system configuration.
A high functionality bus controller is also provided, enabling fast and easy connection of DRAM, SDRAM, and other kinds of memory.
A single-power flash memory (F-ZTAT™) version and masked ROM version are available for this LSI´s ROM. The F-ZTAT version provides flexibility as it can be reprogrammed quickly to cope with all situations from the early stages of production to full-scale production. This is particularly applicable to application devices with specifications that will most probably change.

Key Features:

• Operating frequency (MHz)/Supply voltage (V)
  • 33 MHz/3.0 to 3.6 V
    • Minimum instruction-execution time: 30 ns (33 MHz/3.3 V)
• On-chip memory
  • 256 kB/ 8kB: H8S/2676
  • 128 kB/ 8kB: H8S/2675
  • 64 kB/ 8kB: H8S/2673
  • -/ 32 kB: H8S/2674R
  • -/ 8 kB: H8S/2670
• Ease of use:
  • EEPMOV instruction: Dummy read deleted
  • IPR independence (EXDMAC and IRQ)
  • A/D registers: increased from 4 to 8
• Bus controller improved
  • OE signal added (for fast page/EDO)
  • 64 Mb DRAM direct Interface supported
  • Two burst ROM areas (area 0 and 1)
• Various peripheral functions
  • 16 IRQs
  • EXDMAC x 4 ch added
• Internal SDRAM interface H8S/2678R Group
  • 64-Mbit direct connection interface
  • Hold times assured by dedicated SDRAM
  • Includes clock suspension function
• Package (QFP, LQFP)
  • FP-144G (20.0 x 20.0mm, 0.5mm pitch): H8S/2678 Group
  • FP-144H (20.0 x 20.0mm, 0.5mm pitch): H8S/2678R Group

Key Applications:

Car audio, game machines.musical instruments, remote controllers, officeautomation equipment, PC peripherals (External memory, input, output),communication equipment ,telephone, home information appliances, digital consumer applications, printers

Built-in Functions

 

• High-speed H8S/2000 central processing unit with 16-bit architecture
  • Upward-compatible with H8/300 and H8/300H CPUs on the object level
  • Sixteen 16-bit general registers
  • 69 basic instructions
  • Address space: 16 Mbytes
• Interrupts
  • Internal: 56
  • External: 17
• Bus controller
  • External data bus width: 8/16 bits
• Peripheral functions
  • DMA controller (DMAC)
  • EXDMA controller (EXDMAC)
  • Data transfer controller (DTC) x 85 ch
  • 16-bit timer pulse unit (TPU) x 6 ch
  • Programmable pulse generator (PPG) x 16 ch
  • 8-bit timer (TMR) x 2 ch
  • Watchdog timer (WDT) x 1 ch
  • Asynchronous or clocked synchronous serial communication interface (SCI) x 3ch
  • 10-bit A/D converter x 12 ch
  • 8-bit D/A converter x 4 ch
  • Clock pulse generator
• General I/O ports
  • I/O pins: 103
  • Input-only pins: 12